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mirror of https://github.com/deadw00d/AROS.git synced 2025-12-06 21:40:57 +00:00

rhine: Minor DMA fix

An invalid size was passed to CachePostDMA(), which could have caused
the driver to be broken on non-cache-coherent architectures (e.g.
PowerPC/Pegasos-II).
This commit is contained in:
Neil Cafferkey
2025-08-30 00:52:53 +01:00
parent 5d84283a99
commit 7f637cbf6d
2 changed files with 6 additions and 6 deletions

View File

@ -36,8 +36,8 @@ MA 02111-1307, USA.
#define DEVICE_NAME "rhine.device"
#define VERSION 1
#define REVISION 1
#define DATE "19.7.2025"
#define REVISION 2
#define DATE "30.8.2025"
#define UTILITY_VERSION 36
#define PROMETHEUS_VERSION 2

View File

@ -1,6 +1,6 @@
/*
Copyright (C) 2001-2017 Neil Cafferkey
Copyright (C) 2001-2025 Neil Cafferkey
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
@ -210,7 +210,7 @@ struct DevUnit *CreateUnit(ULONG index, APTR card,
if(success)
{
/* Fill arrays of virtual and physical addresses of TX descriptors */
/* Fill arrays of virtual and physical addresses of RX descriptors */
dma_size = RH_DESCSIZE * RX_SLOT_COUNT;
desc_p = (ULONG)(UPINT)CachePreDMA(desc, &dma_size, 0);
@ -1503,7 +1503,7 @@ static VOID TXInt(REG(a1, struct DevUnit *unit), REG(a5, APTR int_code))
static VOID TXEndInt(REG(a1, struct DevUnit *unit), REG(a5, APTR int_code))
{
UWORD data_size, i = 0;
UWORD i = 0;
UBYTE *buffer;
struct DevBase *base;
ULONG *desc, dma_size;
@ -1530,7 +1530,7 @@ static VOID TXEndInt(REG(a1, struct DevUnit *unit), REG(a5, APTR int_code))
== 0 && i != unit->tx_in_slot)
{
buffer = unit->tx_buffers[i];
dma_size = data_size;
dma_size = unit->tx_requests[i]->ios2_DataLength;
CachePostDMA(buffer, &dma_size, DMA_ReadFromRAM);
/* Check if unit's buffer is now free */