parent
f3810d710b
commit
3bc587cf10
10
param_tbl.h
10
param_tbl.h
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@ -73,7 +73,7 @@ PARAM_PLL_STD(pll_std_p_init,
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"Proportional term when PLL starts.\n\n"
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"Reducing this will make the PLL more resistant to measurement"
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" noise and jitter, but also makes it converge slower."
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" Increasing this will allmost certainly cause oscillation."
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" Increasing this will almost certainly cause oscillation."
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)
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PARAM_PLL_STD(pll_std_i_init,
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@ -85,17 +85,17 @@ PARAM_PLL_STD(pll_std_i_init,
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PARAM_PLL_STD(pll_std_capture_time,
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20, 1e6, 300,
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"Capture time before stiffning PLL.\n\n"
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"Capture time before stiffening PLL.\n\n"
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"After this many seconds, the PLL will start to stiffen the"
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" P and I terms to gain noise immunity."
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" Decreasing risks that initial frequency capture is not finished,"
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" which will increase the offset-excursion."
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" Increasing just delays this stiffning."
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" Increasing just delays this stiffening."
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)
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PARAM_PLL_STD(pll_std_stiffen_rate,
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0.5, 1.0, 0.999,
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"Rate of PLL P/I term stiffning.\n\n"
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"Rate of PLL P/I term stiffening.\n\n"
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"The exponential stiffening per second of D and I terms."
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" Decreasing makes stiffening faster."
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" Increasing makes stiffening slower."
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@ -105,7 +105,7 @@ PARAM_PLL_STD(pll_std_p_limit,
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1e-6, 0.50, 3e-2,
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"Lower limit for Proportional term.\n\n"
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"Reducing this will make the PLL more resistent to noise,"
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" but going to far it will not be able to steer the clock fast enough."
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" but going too far it will not be able to steer the clock fast enough."
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" Increasing this makes the PLL more agile and prone to noise."
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)
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