mirror of
https://frontier.innolan.net/github/amigaos-cross-toolchain6.git
synced 2024-10-19 10:29:55 +00:00
Revert to previous version. New one breaks my sources.
This commit is contained in:
Krystian Bacławski
@ -24,71 +24,53 @@
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#define LP0(offs, rt, name, bt, bn) \
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({ \
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rt _##name##_re2 = \
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({ \
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register int _d1 __asm("d1"); \
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register int _a0 __asm("a0"); \
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register int _a1 __asm("a1"); \
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{ \
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register rt _##name##_re __asm("d0"); \
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register void *const _##name##_bn __asm("a6") = (bn); \
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register struct Library *const _##name##_bn __asm("a6") = (struct Library*)(bn); \
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__asm volatile ("jsr a6@(-"#offs":W)" \
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: "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
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: "=r" (_##name##_re) \
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: "r" (_##name##_bn) \
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: "fp0", "fp1", "cc", "memory"); \
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: "d0", "d1", "a0", "a1", "fp0", "fp1", "cc", "memory"); \
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_##name##_re; \
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}); \
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_##name##_re2; \
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} \
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})
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#define LP0NR(offs, name, bt, bn) \
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({ \
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{ \
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register int _d0 __asm("d0"); \
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register int _d1 __asm("d1"); \
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register int _a0 __asm("a0"); \
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register int _a1 __asm("a1"); \
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register void *const _##name##_bn __asm("a6") = (bn); \
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register struct Library *const _##name##_bn __asm("a6") = (struct Library*)(bn); \
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__asm volatile ("jsr a6@(-"#offs":W)" \
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: "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
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: /* no output */ \
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: "r" (_##name##_bn) \
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: "fp0", "fp1", "cc", "memory"); \
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: "d0", "d1", "a0", "a1", "fp0", "fp1", "cc", "memory"); \
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} \
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})
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#define LP1(offs, rt, name, t1, v1, r1, bt, bn) \
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({ \
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t1 _##name##_v1 = (v1); \
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rt _##name##_re2 = \
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({ \
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register int _d1 __asm("d1"); \
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register int _a0 __asm("a0"); \
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register int _a1 __asm("a1"); \
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{ \
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register rt _##name##_re __asm("d0"); \
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register void *const _##name##_bn __asm("a6") = (bn); \
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register struct Library *const _##name##_bn __asm("a6") = (struct Library*)(bn); \
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register t1 _n1 __asm(#r1) = _##name##_v1; \
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__asm volatile ("jsr a6@(-"#offs":W)" \
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: "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
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: "=r" (_##name##_re) \
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: "r" (_##name##_bn), "rf"(_n1) \
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: "fp0", "fp1", "cc", "memory"); \
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: "d0", "d1", "a0", "a1", "fp0", "fp1", "cc", "memory"); \
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_##name##_re; \
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}); \
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_##name##_re2; \
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} \
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})
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#define LP1NR(offs, name, t1, v1, r1, bt, bn) \
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({ \
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t1 _##name##_v1 = (v1); \
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{ \
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register int _d0 __asm("d0"); \
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register int _d1 __asm("d1"); \
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register int _a0 __asm("a0"); \
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register int _a1 __asm("a1"); \
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register void *const _##name##_bn __asm("a6") = (bn); \
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register struct Library *const _##name##_bn __asm("a6") = (struct Library*)(bn); \
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register t1 _n1 __asm(#r1) = _##name##_v1; \
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__asm volatile ("jsr a6@(-"#offs":W)" \
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: "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
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: /* no output */ \
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: "r" (_##name##_bn), "rf"(_n1) \
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: "fp0", "fp1", "cc", "memory"); \
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: "d0", "d1", "a0", "a1", "fp0", "fp1", "cc", "memory"); \
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} \
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})
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@ -96,21 +78,16 @@
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#define LP1A5(offs, rt, name, t1, v1, r1, bt, bn) \
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({ \
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t1 _##name##_v1 = (v1); \
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rt _##name##_re2 = \
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({ \
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register int _d1 __asm("d1"); \
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register int _a0 __asm("a0"); \
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register int _a1 __asm("a1"); \
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{ \
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register rt _##name##_re __asm("d0"); \
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register void *const _##name##_bn __asm("a6") = (bn); \
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register struct Library *const _##name##_bn __asm("a6") = (struct Library*)(bn); \
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register t1 _n1 __asm(#r1) = _##name##_v1; \
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__asm volatile ("exg d7,a5\n\tjsr a6@(-"#offs":W)\n\texg d7,a5" \
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: "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
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: "=r" (_##name##_re) \
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: "r" (_##name##_bn), "rf"(_n1) \
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: "fp0", "fp1", "cc", "memory"); \
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: "d0", "d1", "a0", "a1", "fp0", "fp1", "cc", "memory"); \
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_##name##_re; \
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}); \
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_##name##_re2; \
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} \
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})
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/* Only graphics.library/LockLayerRom() and graphics.library/UnlockLayerRom() */
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@ -118,16 +95,12 @@
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({ \
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t1 _##name##_v1 = (v1); \
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{ \
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register int _d0 __asm("d0"); \
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register int _d1 __asm("d1"); \
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register int _a0 __asm("a0"); \
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register int _a1 __asm("a1"); \
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register void *const _##name##_bn __asm("a6") = (bn); \
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register struct Library *const _##name##_bn __asm("a6") = (struct Library*)(bn); \
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register t1 _n1 __asm(#r1) = _##name##_v1; \
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__asm volatile ("exg d7,a5\n\tjsr a6@(-"#offs":W)\n\texg d7,a5" \
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: "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
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: /* no output */ \
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: "r" (_##name##_bn), "rf"(_n1) \
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: "fp0", "fp1", "cc", "memory"); \
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: "d0", "d1", "a0", "a1", "fp0", "fp1", "cc", "memory"); \
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} \
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})
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@ -136,43 +109,33 @@
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({ \
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typedef fpt; \
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t1 _##name##_v1 = (v1); \
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rt _##name##_re2 = \
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({ \
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register int _d1 __asm("d1"); \
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register int _a0 __asm("a0"); \
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register int _a1 __asm("a1"); \
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{ \
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register rt _##name##_re __asm("d0"); \
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register void *const _##name##_bn __asm("a6") = (bn); \
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register struct Library *const _##name##_bn __asm("a6") = (struct Library*)(bn); \
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register t1 _n1 __asm(#r1) = _##name##_v1; \
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__asm volatile ("exg d7,a5\n\tjsr a6@(-"#offs":W)\n\texg d7,a5" \
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: "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
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: "=r" (_##name##_re) \
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: "r" (_##name##_bn), "rf"(_n1) \
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: "fp0", "fp1", "cc", "memory"); \
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: "d0", "d1", "a0", "a1", "fp0", "fp1", "cc", "memory"); \
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_##name##_re; \
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}); \
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_##name##_re2; \
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} \
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})
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#define LP2(offs, rt, name, t1, v1, r1, t2, v2, r2, bt, bn) \
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({ \
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t1 _##name##_v1 = (v1); \
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t2 _##name##_v2 = (v2); \
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rt _##name##_re2 = \
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({ \
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register int _d1 __asm("d1"); \
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register int _a0 __asm("a0"); \
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register int _a1 __asm("a1"); \
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{ \
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register rt _##name##_re __asm("d0"); \
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register void *const _##name##_bn __asm("a6") = (bn); \
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register struct Library *const _##name##_bn __asm("a6") = (struct Library*)(bn); \
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register t1 _n1 __asm(#r1) = _##name##_v1; \
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register t2 _n2 __asm(#r2) = _##name##_v2; \
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__asm volatile ("jsr a6@(-"#offs":W)" \
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: "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
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: "=r" (_##name##_re) \
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: "r" (_##name##_bn), "rf"(_n1), "rf"(_n2) \
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||||
: "fp0", "fp1", "cc", "memory"); \
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: "d0", "d1", "a0", "a1", "fp0", "fp1", "cc", "memory"); \
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_##name##_re; \
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}); \
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_##name##_re2; \
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} \
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})
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#define LP2NR(offs, name, t1, v1, r1, t2, v2, r2, bt, bn) \
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@ -180,17 +143,13 @@
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t1 _##name##_v1 = (v1); \
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t2 _##name##_v2 = (v2); \
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{ \
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register int _d0 __asm("d0"); \
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register int _d1 __asm("d1"); \
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register int _a0 __asm("a0"); \
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register int _a1 __asm("a1"); \
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register void *const _##name##_bn __asm("a6") = (bn); \
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register struct Library *const _##name##_bn __asm("a6") = (struct Library*)(bn); \
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register t1 _n1 __asm(#r1) = _##name##_v1; \
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register t2 _n2 __asm(#r2) = _##name##_v2; \
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__asm volatile ("jsr a6@(-"#offs":W)" \
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: "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
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||||
: /* no output */ \
|
||||
: "r" (_##name##_bn), "rf"(_n1), "rf"(_n2) \
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||||
: "fp0", "fp1", "cc", "memory"); \
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: "d0", "d1", "a0", "a1", "fp0", "fp1", "cc", "memory"); \
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} \
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||||
})
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||||
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@ -199,21 +158,16 @@
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({ \
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||||
t1 _##name##_v1 = (v1); \
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t2 _##name##_v2 = (v2); \
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rt _##name##_re2 = \
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({ \
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||||
register int _d1 __asm("d1"); \
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||||
register int _a0 __asm("a0"); \
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||||
register int _a1 __asm("a1"); \
|
||||
{ \
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||||
register rt _##name##_re __asm("d0"); \
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||||
register t1 _n1 __asm(#r1) = _##name##_v1; \
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||||
register t2 _n2 __asm(#r2) = _##name##_v2; \
|
||||
__asm volatile ("jsr a6@(-"#offs":W)" \
|
||||
: "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
|
||||
: "=r" (_##name##_re) \
|
||||
: "r"(_n1), "rf"(_n2) \
|
||||
: "fp0", "fp1", "cc", "memory"); \
|
||||
: "d0", "d1", "a0", "a1", "fp0", "fp1", "cc", "memory"); \
|
||||
_##name##_re; \
|
||||
}); \
|
||||
_##name##_re2; \
|
||||
} \
|
||||
})
|
||||
|
||||
/* Only dos.library/InternalUnLoadSeg() */
|
||||
@ -222,22 +176,17 @@
|
||||
typedef fpt; \
|
||||
t1 _##name##_v1 = (v1); \
|
||||
t2 _##name##_v2 = (v2); \
|
||||
rt _##name##_re2 = \
|
||||
({ \
|
||||
register int _d1 __asm("d1"); \
|
||||
register int _a0 __asm("a0"); \
|
||||
register int _a1 __asm("a1"); \
|
||||
{ \
|
||||
register rt _##name##_re __asm("d0"); \
|
||||
register void *const _##name##_bn __asm("a6") = (bn); \
|
||||
register struct Library *const _##name##_bn __asm("a6") = (struct Library*)(bn); \
|
||||
register t1 _n1 __asm(#r1) = _##name##_v1; \
|
||||
register t2 _n2 __asm(#r2) = _##name##_v2; \
|
||||
__asm volatile ("jsr a6@(-"#offs":W)" \
|
||||
: "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
|
||||
: "=r" (_##name##_re) \
|
||||
: "r" (_##name##_bn), "rf"(_n1), "rf"(_n2) \
|
||||
: "fp0", "fp1", "cc", "memory"); \
|
||||
: "d0", "d1", "a0", "a1", "fp0", "fp1", "cc", "memory"); \
|
||||
_##name##_re; \
|
||||
}); \
|
||||
_##name##_re2; \
|
||||
} \
|
||||
})
|
||||
|
||||
#define LP3(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, bt, bn) \
|
||||
@ -245,23 +194,18 @@
|
||||
t1 _##name##_v1 = (v1); \
|
||||
t2 _##name##_v2 = (v2); \
|
||||
t3 _##name##_v3 = (v3); \
|
||||
rt _##name##_re2 = \
|
||||
({ \
|
||||
register int _d1 __asm("d1"); \
|
||||
register int _a0 __asm("a0"); \
|
||||
register int _a1 __asm("a1"); \
|
||||
{ \
|
||||
register rt _##name##_re __asm("d0"); \
|
||||
register void *const _##name##_bn __asm("a6") = (bn); \
|
||||
register struct Library *const _##name##_bn __asm("a6") = (struct Library*)(bn); \
|
||||
register t1 _n1 __asm(#r1) = _##name##_v1; \
|
||||
register t2 _n2 __asm(#r2) = _##name##_v2; \
|
||||
register t3 _n3 __asm(#r3) = _##name##_v3; \
|
||||
__asm volatile ("jsr a6@(-"#offs":W)" \
|
||||
: "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
|
||||
: "=r" (_##name##_re) \
|
||||
: "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3) \
|
||||
: "fp0", "fp1", "cc", "memory"); \
|
||||
: "d0", "d1", "a0", "a1", "fp0", "fp1", "cc", "memory"); \
|
||||
_##name##_re; \
|
||||
}); \
|
||||
_##name##_re2; \
|
||||
} \
|
||||
})
|
||||
|
||||
#define LP3NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, bt, bn) \
|
||||
@ -270,18 +214,14 @@
|
||||
t2 _##name##_v2 = (v2); \
|
||||
t3 _##name##_v3 = (v3); \
|
||||
{ \
|
||||
register int _d0 __asm("d0"); \
|
||||
register int _d1 __asm("d1"); \
|
||||
register int _a0 __asm("a0"); \
|
||||
register int _a1 __asm("a1"); \
|
||||
register void *const _##name##_bn __asm("a6") = (bn); \
|
||||
register struct Library *const _##name##_bn __asm("a6") = (struct Library*)(bn); \
|
||||
register t1 _n1 __asm(#r1) = _##name##_v1; \
|
||||
register t2 _n2 __asm(#r2) = _##name##_v2; \
|
||||
register t3 _n3 __asm(#r3) = _##name##_v3; \
|
||||
__asm volatile ("jsr a6@(-"#offs":W)" \
|
||||
: "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
|
||||
: /* no output */ \
|
||||
: "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3) \
|
||||
: "fp0", "fp1", "cc", "memory"); \
|
||||
: "d0", "d1", "a0", "a1", "fp0", "fp1", "cc", "memory"); \
|
||||
} \
|
||||
})
|
||||
|
||||
@ -291,22 +231,17 @@
|
||||
t1 _##name##_v1 = (v1); \
|
||||
t2 _##name##_v2 = (v2); \
|
||||
t3 _##name##_v3 = (v3); \
|
||||
rt _##name##_re2 = \
|
||||
({ \
|
||||
register int _d1 __asm("d1"); \
|
||||
register int _a0 __asm("a0"); \
|
||||
register int _a1 __asm("a1"); \
|
||||
{ \
|
||||
register rt _##name##_re __asm("d0"); \
|
||||
register t1 _n1 __asm(#r1) = _##name##_v1; \
|
||||
register t2 _n2 __asm(#r2) = _##name##_v2; \
|
||||
register t3 _n3 __asm(#r3) = _##name##_v3; \
|
||||
__asm volatile ("jsr a6@(-"#offs":W)" \
|
||||
: "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
|
||||
: "=r" (_##name##_re) \
|
||||
: "r"(_n1), "rf"(_n2), "rf"(_n3) \
|
||||
: "fp0", "fp1", "cc", "memory"); \
|
||||
: "d0", "d1", "a0", "a1", "fp0", "fp1", "cc", "memory"); \
|
||||
_##name##_re; \
|
||||
}); \
|
||||
_##name##_re2; \
|
||||
} \
|
||||
})
|
||||
|
||||
/* Only cia.resource/RemICRVector() */
|
||||
@ -316,17 +251,13 @@
|
||||
t2 _##name##_v2 = (v2); \
|
||||
t3 _##name##_v3 = (v3); \
|
||||
{ \
|
||||
register int _d0 __asm("d0"); \
|
||||
register int _d1 __asm("d1"); \
|
||||
register int _a0 __asm("a0"); \
|
||||
register int _a1 __asm("a1"); \
|
||||
register t1 _n1 __asm(#r1) = _##name##_v1; \
|
||||
register t2 _n2 __asm(#r2) = _##name##_v2; \
|
||||
register t3 _n3 __asm(#r3) = _##name##_v3; \
|
||||
__asm volatile ("jsr a6@(-"#offs":W)" \
|
||||
: "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
|
||||
: /* no output */ \
|
||||
: "r"(_n1), "rf"(_n2), "rf"(_n3) \
|
||||
: "fp0", "fp1", "cc", "memory"); \
|
||||
: "d0", "d1", "a0", "a1", "fp0", "fp1", "cc", "memory"); \
|
||||
} \
|
||||
})
|
||||
|
||||
@ -337,23 +268,18 @@
|
||||
t1 _##name##_v1 = (v1); \
|
||||
t2 _##name##_v2 = (v2); \
|
||||
t3 _##name##_v3 = (v3); \
|
||||
rt _##name##_re2 = \
|
||||
({ \
|
||||
register int _d1 __asm("d1"); \
|
||||
register int _a0 __asm("a0"); \
|
||||
register int _a1 __asm("a1"); \
|
||||
{ \
|
||||
register rt _##name##_re __asm("d0"); \
|
||||
register void *const _##name##_bn __asm("a6") = (bn); \
|
||||
register struct Library *const _##name##_bn __asm("a6") = (struct Library*)(bn); \
|
||||
register t1 _n1 __asm(#r1) = _##name##_v1; \
|
||||
register t2 _n2 __asm(#r2) = _##name##_v2; \
|
||||
register t3 _n3 __asm(#r3) = _##name##_v3; \
|
||||
__asm volatile ("jsr a6@(-"#offs":W)" \
|
||||
: "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
|
||||
: "=r" (_##name##_re) \
|
||||
: "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3) \
|
||||
: "fp0", "fp1", "cc", "memory"); \
|
||||
: "d0", "d1", "a0", "a1", "fp0", "fp1", "cc", "memory"); \
|
||||
_##name##_re; \
|
||||
}); \
|
||||
_##name##_re2; \
|
||||
} \
|
||||
})
|
||||
|
||||
/* Only graphics.library/SetCollision() */
|
||||
@ -364,18 +290,14 @@
|
||||
t2 _##name##_v2 = (v2); \
|
||||
t3 _##name##_v3 = (v3); \
|
||||
{ \
|
||||
register int _d0 __asm("d0"); \
|
||||
register int _d1 __asm("d1"); \
|
||||
register int _a0 __asm("a0"); \
|
||||
register int _a1 __asm("a1"); \
|
||||
register void *const _##name##_bn __asm("a6") = (bn); \
|
||||
register struct Library *const _##name##_bn __asm("a6") = (struct Library*)(bn); \
|
||||
register t1 _n1 __asm(#r1) = _##name##_v1; \
|
||||
register t2 _n2 __asm(#r2) = _##name##_v2; \
|
||||
register t3 _n3 __asm(#r3) = _##name##_v3; \
|
||||
__asm volatile ("jsr a6@(-"#offs":W)" \
|
||||
: "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
|
||||
: /* no output */ \
|
||||
: "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3) \
|
||||
: "fp0", "fp1", "cc", "memory"); \
|
||||
: "d0", "d1", "a0", "a1", "fp0", "fp1", "cc", "memory"); \
|
||||
} \
|
||||
})
|
||||
|
||||
@ -385,24 +307,19 @@
|
||||
t2 _##name##_v2 = (v2); \
|
||||
t3 _##name##_v3 = (v3); \
|
||||
t4 _##name##_v4 = (v4); \
|
||||
rt _##name##_re2 = \
|
||||
({ \
|
||||
register int _d1 __asm("d1"); \
|
||||
register int _a0 __asm("a0"); \
|
||||
register int _a1 __asm("a1"); \
|
||||
{ \
|
||||
register rt _##name##_re __asm("d0"); \
|
||||
register void *const _##name##_bn __asm("a6") = (bn); \
|
||||
register struct Library *const _##name##_bn __asm("a6") = (struct Library*)(bn); \
|
||||
register t1 _n1 __asm(#r1) = _##name##_v1; \
|
||||
register t2 _n2 __asm(#r2) = _##name##_v2; \
|
||||
register t3 _n3 __asm(#r3) = _##name##_v3; \
|
||||
register t4 _n4 __asm(#r4) = _##name##_v4; \
|
||||
__asm volatile ("jsr a6@(-"#offs":W)" \
|
||||
: "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
|
||||
: "=r" (_##name##_re) \
|
||||
: "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4) \
|
||||
: "fp0", "fp1", "cc", "memory"); \
|
||||
: "d0", "d1", "a0", "a1", "fp0", "fp1", "cc", "memory"); \
|
||||
_##name##_re; \
|
||||
}); \
|
||||
_##name##_re2; \
|
||||
} \
|
||||
})
|
||||
|
||||
#define LP4NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, bt, bn) \
|
||||
@ -412,19 +329,15 @@
|
||||
t3 _##name##_v3 = (v3); \
|
||||
t4 _##name##_v4 = (v4); \
|
||||
{ \
|
||||
register int _d0 __asm("d0"); \
|
||||
register int _d1 __asm("d1"); \
|
||||
register int _a0 __asm("a0"); \
|
||||
register int _a1 __asm("a1"); \
|
||||
register void *const _##name##_bn __asm("a6") = (bn); \
|
||||
register struct Library *const _##name##_bn __asm("a6") = (struct Library*)(bn); \
|
||||
register t1 _n1 __asm(#r1) = _##name##_v1; \
|
||||
register t2 _n2 __asm(#r2) = _##name##_v2; \
|
||||
register t3 _n3 __asm(#r3) = _##name##_v3; \
|
||||
register t4 _n4 __asm(#r4) = _##name##_v4; \
|
||||
__asm volatile ("jsr a6@(-"#offs":W)" \
|
||||
: "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
|
||||
: /* no output */ \
|
||||
: "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4) \
|
||||
: "fp0", "fp1", "cc", "memory"); \
|
||||
: "d0", "d1", "a0", "a1", "fp0", "fp1", "cc", "memory"); \
|
||||
} \
|
||||
})
|
||||
|
||||
@ -436,24 +349,19 @@
|
||||
t2 _##name##_v2 = (v2); \
|
||||
t3 _##name##_v3 = (v3); \
|
||||
t4 _##name##_v4 = (v4); \
|
||||
rt _##name##_re2 = \
|
||||
({ \
|
||||
register int _d1 __asm("d1"); \
|
||||
register int _a0 __asm("a0"); \
|
||||
register int _a1 __asm("a1"); \
|
||||
{ \
|
||||
register rt _##name##_re __asm("d0"); \
|
||||
register void *const _##name##_bn __asm("a6") = (bn); \
|
||||
register struct Library *const _##name##_bn __asm("a6") = (struct Library*)(bn); \
|
||||
register t1 _n1 __asm(#r1) = _##name##_v1; \
|
||||
register t2 _n2 __asm(#r2) = _##name##_v2; \
|
||||
register t3 _n3 __asm(#r3) = _##name##_v3; \
|
||||
register t4 _n4 __asm(#r4) = _##name##_v4; \
|
||||
__asm volatile ("jsr a6@(-"#offs":W)" \
|
||||
: "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
|
||||
: "=r" (_##name##_re) \
|
||||
: "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4) \
|
||||
: "fp0", "fp1", "cc", "memory"); \
|
||||
: "d0", "d1", "a0", "a1", "fp0", "fp1", "cc", "memory"); \
|
||||
_##name##_re; \
|
||||
}); \
|
||||
_##name##_re2; \
|
||||
} \
|
||||
})
|
||||
|
||||
#define LP5(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, bt, bn) \
|
||||
@ -463,25 +371,20 @@
|
||||
t3 _##name##_v3 = (v3); \
|
||||
t4 _##name##_v4 = (v4); \
|
||||
t5 _##name##_v5 = (v5); \
|
||||
rt _##name##_re2 = \
|
||||
({ \
|
||||
register int _d1 __asm("d1"); \
|
||||
register int _a0 __asm("a0"); \
|
||||
register int _a1 __asm("a1"); \
|
||||
{ \
|
||||
register rt _##name##_re __asm("d0"); \
|
||||
register void *const _##name##_bn __asm("a6") = (bn); \
|
||||
register struct Library *const _##name##_bn __asm("a6") = (struct Library*)(bn); \
|
||||
register t1 _n1 __asm(#r1) = _##name##_v1; \
|
||||
register t2 _n2 __asm(#r2) = _##name##_v2; \
|
||||
register t3 _n3 __asm(#r3) = _##name##_v3; \
|
||||
register t4 _n4 __asm(#r4) = _##name##_v4; \
|
||||
register t5 _n5 __asm(#r5) = _##name##_v5; \
|
||||
__asm volatile ("jsr a6@(-"#offs":W)" \
|
||||
: "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
|
||||
: "=r" (_##name##_re) \
|
||||
: "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5) \
|
||||
: "fp0", "fp1", "cc", "memory"); \
|
||||
: "d0", "d1", "a0", "a1", "fp0", "fp1", "cc", "memory"); \
|
||||
_##name##_re; \
|
||||
}); \
|
||||
_##name##_re2; \
|
||||
} \
|
||||
})
|
||||
|
||||
#define LP5NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, bt, bn) \
|
||||
@ -492,20 +395,16 @@
|
||||
t4 _##name##_v4 = (v4); \
|
||||
t5 _##name##_v5 = (v5); \
|
||||
{ \
|
||||
register int _d0 __asm("d0"); \
|
||||
register int _d1 __asm("d1"); \
|
||||
register int _a0 __asm("a0"); \
|
||||
register int _a1 __asm("a1"); \
|
||||
register void *const _##name##_bn __asm("a6") = (bn); \
|
||||
register struct Library *const _##name##_bn __asm("a6") = (struct Library*)(bn); \
|
||||
register t1 _n1 __asm(#r1) = _##name##_v1; \
|
||||
register t2 _n2 __asm(#r2) = _##name##_v2; \
|
||||
register t3 _n3 __asm(#r3) = _##name##_v3; \
|
||||
register t4 _n4 __asm(#r4) = _##name##_v4; \
|
||||
register t5 _n5 __asm(#r5) = _##name##_v5; \
|
||||
__asm volatile ("jsr a6@(-"#offs":W)" \
|
||||
: "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
|
||||
: /* no output */ \
|
||||
: "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5) \
|
||||
: "fp0", "fp1", "cc", "memory"); \
|
||||
: "d0", "d1", "a0", "a1", "fp0", "fp1", "cc", "memory"); \
|
||||
} \
|
||||
})
|
||||
|
||||
@ -518,54 +417,20 @@
|
||||
t3 _##name##_v3 = (v3); \
|
||||
t4 _##name##_v4 = (v4); \
|
||||
t5 _##name##_v5 = (v5); \
|
||||
rt _##name##_re2 = \
|
||||
({ \
|
||||
register int _d1 __asm("d1"); \
|
||||
register int _a0 __asm("a0"); \
|
||||
register int _a1 __asm("a1"); \
|
||||
{ \
|
||||
register rt _##name##_re __asm("d0"); \
|
||||
register void *const _##name##_bn __asm("a6") = (bn); \
|
||||
register struct Library *const _##name##_bn __asm("a6") = (struct Library*)(bn); \
|
||||
register t1 _n1 __asm(#r1) = _##name##_v1; \
|
||||
register t2 _n2 __asm(#r2) = _##name##_v2; \
|
||||
register t3 _n3 __asm(#r3) = _##name##_v3; \
|
||||
register t4 _n4 __asm(#r4) = _##name##_v4; \
|
||||
register t5 _n5 __asm(#r5) = _##name##_v5; \
|
||||
__asm volatile ("jsr a6@(-"#offs":W)" \
|
||||
: "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
|
||||
: "=r" (_##name##_re) \
|
||||
: "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5) \
|
||||
: "fp0", "fp1", "cc", "memory"); \
|
||||
: "d0", "d1", "a0", "a1", "fp0", "fp1", "cc", "memory"); \
|
||||
_##name##_re; \
|
||||
}); \
|
||||
_##name##_re2; \
|
||||
})
|
||||
|
||||
/* Only reqtools.library/XXX() */
|
||||
#define LP5A4(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, bt, bn) \
|
||||
({ \
|
||||
t1 _##name##_v1 = (v1); \
|
||||
t2 _##name##_v2 = (v2); \
|
||||
t3 _##name##_v3 = (v3); \
|
||||
t4 _##name##_v4 = (v4); \
|
||||
t5 _##name##_v5 = (v5); \
|
||||
rt _##name##_re2 = \
|
||||
({ \
|
||||
register int _d1 __asm("d1"); \
|
||||
register int _a0 __asm("a0"); \
|
||||
register int _a1 __asm("a1"); \
|
||||
register rt _##name##_re __asm("d0"); \
|
||||
register void *const _##name##_bn __asm("a6") = (bn); \
|
||||
register t1 _n1 __asm(#r1) = _##name##_v1; \
|
||||
register t2 _n2 __asm(#r2) = _##name##_v2; \
|
||||
register t3 _n3 __asm(#r3) = _##name##_v3; \
|
||||
register t4 _n4 __asm(#r4) = _##name##_v4; \
|
||||
register t5 _n5 __asm(#r5) = _##name##_v5; \
|
||||
__asm volatile ("exg d7,a4\n\tjsr a6@(-"#offs":W)\n\texg d7,a4" \
|
||||
: "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
|
||||
: "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5) \
|
||||
: "fp0", "fp1", "cc", "memory"); \
|
||||
_##name##_re; \
|
||||
}); \
|
||||
_##name##_re2; \
|
||||
} \
|
||||
})
|
||||
|
||||
#define LP6(offs, rt, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, bt, bn) \
|
||||
@ -576,13 +441,9 @@
|
||||
t4 _##name##_v4 = (v4); \
|
||||
t5 _##name##_v5 = (v5); \
|
||||
t6 _##name##_v6 = (v6); \
|
||||
rt _##name##_re2 = \
|
||||
({ \
|
||||
register int _d1 __asm("d1"); \
|
||||
register int _a0 __asm("a0"); \
|
||||
register int _a1 __asm("a1"); \
|
||||
{ \
|
||||
register rt _##name##_re __asm("d0"); \
|
||||
register void *const _##name##_bn __asm("a6") = (bn); \
|
||||
register struct Library *const _##name##_bn __asm("a6") = (struct Library*)(bn); \
|
||||
register t1 _n1 __asm(#r1) = _##name##_v1; \
|
||||
register t2 _n2 __asm(#r2) = _##name##_v2; \
|
||||
register t3 _n3 __asm(#r3) = _##name##_v3; \
|
||||
@ -590,12 +451,11 @@
|
||||
register t5 _n5 __asm(#r5) = _##name##_v5; \
|
||||
register t6 _n6 __asm(#r6) = _##name##_v6; \
|
||||
__asm volatile ("jsr a6@(-"#offs":W)" \
|
||||
: "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
|
||||
: "=r" (_##name##_re) \
|
||||
: "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6) \
|
||||
: "fp0", "fp1", "cc", "memory"); \
|
||||
: "d0", "d1", "a0", "a1", "fp0", "fp1", "cc", "memory"); \
|
||||
_##name##_re; \
|
||||
}); \
|
||||
_##name##_re2; \
|
||||
} \
|
||||
})
|
||||
|
||||
#define LP6NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, bt, bn) \
|
||||
@ -607,11 +467,7 @@
|
||||
t5 _##name##_v5 = (v5); \
|
||||
t6 _##name##_v6 = (v6); \
|
||||
{ \
|
||||
register int _d0 __asm("d0"); \
|
||||
register int _d1 __asm("d1"); \
|
||||
register int _a0 __asm("a0"); \
|
||||
register int _a1 __asm("a1"); \
|
||||
register void *const _##name##_bn __asm("a6") = (bn); \
|
||||
register struct Library *const _##name##_bn __asm("a6") = (struct Library*)(bn); \
|
||||
register t1 _n1 __asm(#r1) = _##name##_v1; \
|
||||
register t2 _n2 __asm(#r2) = _##name##_v2; \
|
||||
register t3 _n3 __asm(#r3) = _##name##_v3; \
|
||||
@ -619,9 +475,9 @@
|
||||
register t5 _n5 __asm(#r5) = _##name##_v5; \
|
||||
register t6 _n6 __asm(#r6) = _##name##_v6; \
|
||||
__asm volatile ("jsr a6@(-"#offs":W)" \
|
||||
: "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
|
||||
: /* no output */ \
|
||||
: "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6) \
|
||||
: "fp0", "fp1", "cc", "memory"); \
|
||||
: "d0", "d1", "a0", "a1", "fp0", "fp1", "cc", "memory"); \
|
||||
} \
|
||||
})
|
||||
|
||||
@ -634,13 +490,9 @@
|
||||
t5 _##name##_v5 = (v5); \
|
||||
t6 _##name##_v6 = (v6); \
|
||||
t7 _##name##_v7 = (v7); \
|
||||
rt _##name##_re2 = \
|
||||
({ \
|
||||
register int _d1 __asm("d1"); \
|
||||
register int _a0 __asm("a0"); \
|
||||
register int _a1 __asm("a1"); \
|
||||
{ \
|
||||
register rt _##name##_re __asm("d0"); \
|
||||
register void *const _##name##_bn __asm("a6") = (bn); \
|
||||
register struct Library *const _##name##_bn __asm("a6") = (struct Library*)(bn); \
|
||||
register t1 _n1 __asm(#r1) = _##name##_v1; \
|
||||
register t2 _n2 __asm(#r2) = _##name##_v2; \
|
||||
register t3 _n3 __asm(#r3) = _##name##_v3; \
|
||||
@ -649,12 +501,11 @@
|
||||
register t6 _n6 __asm(#r6) = _##name##_v6; \
|
||||
register t7 _n7 __asm(#r7) = _##name##_v7; \
|
||||
__asm volatile ("jsr a6@(-"#offs":W)" \
|
||||
: "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
|
||||
: "=r" (_##name##_re) \
|
||||
: "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7) \
|
||||
: "fp0", "fp1", "cc", "memory"); \
|
||||
: "d0", "d1", "a0", "a1", "fp0", "fp1", "cc", "memory"); \
|
||||
_##name##_re; \
|
||||
}); \
|
||||
_##name##_re2; \
|
||||
} \
|
||||
})
|
||||
|
||||
#define LP7NR(offs, name, t1, v1, r1, t2, v2, r2, t3, v3, r3, t4, v4, r4, t5, v5, r5, t6, v6, r6, t7, v7, r7, bt, bn) \
|
||||
@ -667,11 +518,7 @@
|
||||
t6 _##name##_v6 = (v6); \
|
||||
t7 _##name##_v7 = (v7); \
|
||||
{ \
|
||||
register int _d0 __asm("d0"); \
|
||||
register int _d1 __asm("d1"); \
|
||||
register int _a0 __asm("a0"); \
|
||||
register int _a1 __asm("a1"); \
|
||||
register void *const _##name##_bn __asm("a6") = (bn); \
|
||||
register struct Library *const _##name##_bn __asm("a6") = (struct Library*)(bn); \
|
||||
register t1 _n1 __asm(#r1) = _##name##_v1; \
|
||||
register t2 _n2 __asm(#r2) = _##name##_v2; \
|
||||
register t3 _n3 __asm(#r3) = _##name##_v3; \
|
||||
@ -680,9 +527,9 @@
|
||||
register t6 _n6 __asm(#r6) = _##name##_v6; \
|
||||
register t7 _n7 __asm(#r7) = _##name##_v7; \
|
||||
__asm volatile ("jsr a6@(-"#offs":W)" \
|
||||
: "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
|
||||
: /* no output */ \
|
||||
: "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7) \
|
||||
: "fp0", "fp1", "cc", "memory"); \
|
||||
: "d0", "d1", "a0", "a1", "fp0", "fp1", "cc", "memory"); \
|
||||
} \
|
||||
})
|
||||
|
||||
@ -696,13 +543,9 @@
|
||||
t5 _##name##_v5 = (v5); \
|
||||
t6 _##name##_v6 = (v6); \
|
||||
t7 _##name##_v7 = (v7); \
|
||||
rt _##name##_re2 = \
|
||||
({ \
|
||||
register int _d1 __asm("d1"); \
|
||||
register int _a0 __asm("a0"); \
|
||||
register int _a1 __asm("a1"); \
|
||||
{ \
|
||||
register rt _##name##_re __asm("d0"); \
|
||||
register void *const _##name##_bn __asm("a6") = (bn); \
|
||||
register struct Library *const _##name##_bn __asm("a6") = (struct Library*)(bn); \
|
||||
register t1 _n1 __asm(#r1) = _##name##_v1; \
|
||||
register t2 _n2 __asm(#r2) = _##name##_v2; \
|
||||
register t3 _n3 __asm(#r3) = _##name##_v3; \
|
||||
@ -711,12 +554,11 @@
|
||||
register t6 _n6 __asm(#r6) = _##name##_v6; \
|
||||
register t7 _n7 __asm(#r7) = _##name##_v7; \
|
||||
__asm volatile ("exg d7,a4\n\tjsr a6@(-"#offs":W)\n\texg d7,a4" \
|
||||
: "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
|
||||
: "=r" (_##name##_re) \
|
||||
: "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7) \
|
||||
: "fp0", "fp1", "cc", "memory"); \
|
||||
: "d0", "d1", "a0", "a1", "fp0", "fp1", "cc", "memory"); \
|
||||
_##name##_re; \
|
||||
}); \
|
||||
_##name##_re2; \
|
||||
} \
|
||||
})
|
||||
|
||||
/* Would you believe that there really are beasts that need more than 7
|
||||
@ -733,13 +575,9 @@
|
||||
t6 _##name##_v6 = (v6); \
|
||||
t7 _##name##_v7 = (v7); \
|
||||
t8 _##name##_v8 = (v8); \
|
||||
rt _##name##_re2 = \
|
||||
({ \
|
||||
register int _d1 __asm("d1"); \
|
||||
register int _a0 __asm("a0"); \
|
||||
register int _a1 __asm("a1"); \
|
||||
{ \
|
||||
register rt _##name##_re __asm("d0"); \
|
||||
register void *const _##name##_bn __asm("a6") = (bn); \
|
||||
register struct Library *const _##name##_bn __asm("a6") = (struct Library*)(bn); \
|
||||
register t1 _n1 __asm(#r1) = _##name##_v1; \
|
||||
register t2 _n2 __asm(#r2) = _##name##_v2; \
|
||||
register t3 _n3 __asm(#r3) = _##name##_v3; \
|
||||
@ -749,12 +587,11 @@
|
||||
register t7 _n7 __asm(#r7) = _##name##_v7; \
|
||||
register t8 _n8 __asm(#r8) = _##name##_v8; \
|
||||
__asm volatile ("jsr a6@(-"#offs":W)" \
|
||||
: "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
|
||||
: "=r" (_##name##_re) \
|
||||
: "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7), "rf"(_n8) \
|
||||
: "fp0", "fp1", "cc", "memory"); \
|
||||
: "d0", "d1", "a0", "a1", "fp0", "fp1", "cc", "memory"); \
|
||||
_##name##_re; \
|
||||
}); \
|
||||
_##name##_re2; \
|
||||
} \
|
||||
})
|
||||
|
||||
/* For example intuition.library/ModifyProp() */
|
||||
@ -769,11 +606,7 @@
|
||||
t7 _##name##_v7 = (v7); \
|
||||
t8 _##name##_v8 = (v8); \
|
||||
{ \
|
||||
register int _d0 __asm("d0"); \
|
||||
register int _d1 __asm("d1"); \
|
||||
register int _a0 __asm("a0"); \
|
||||
register int _a1 __asm("a1"); \
|
||||
register void *const _##name##_bn __asm("a6") = (bn); \
|
||||
register struct Library *const _##name##_bn __asm("a6") = (struct Library*)(bn); \
|
||||
register t1 _n1 __asm(#r1) = _##name##_v1; \
|
||||
register t2 _n2 __asm(#r2) = _##name##_v2; \
|
||||
register t3 _n3 __asm(#r3) = _##name##_v3; \
|
||||
@ -783,9 +616,9 @@
|
||||
register t7 _n7 __asm(#r7) = _##name##_v7; \
|
||||
register t8 _n8 __asm(#r8) = _##name##_v8; \
|
||||
__asm volatile ("jsr a6@(-"#offs":W)" \
|
||||
: "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
|
||||
: /* no output */ \
|
||||
: "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7), "rf"(_n8) \
|
||||
: "fp0", "fp1", "cc", "memory"); \
|
||||
: "d0", "d1", "a0", "a1", "fp0", "fp1", "cc", "memory"); \
|
||||
} \
|
||||
})
|
||||
|
||||
@ -801,13 +634,9 @@
|
||||
t7 _##name##_v7 = (v7); \
|
||||
t8 _##name##_v8 = (v8); \
|
||||
t9 _##name##_v9 = (v9); \
|
||||
rt _##name##_re2 = \
|
||||
({ \
|
||||
register int _d1 __asm("d1"); \
|
||||
register int _a0 __asm("a0"); \
|
||||
register int _a1 __asm("a1"); \
|
||||
{ \
|
||||
register rt _##name##_re __asm("d0"); \
|
||||
register void *const _##name##_bn __asm("a6") = (bn); \
|
||||
register struct Library *const _##name##_bn __asm("a6") = (struct Library*)(bn); \
|
||||
register t1 _n1 __asm(#r1) = _##name##_v1; \
|
||||
register t2 _n2 __asm(#r2) = _##name##_v2; \
|
||||
register t3 _n3 __asm(#r3) = _##name##_v3; \
|
||||
@ -818,12 +647,11 @@
|
||||
register t8 _n8 __asm(#r8) = _##name##_v8; \
|
||||
register t9 _n9 __asm(#r9) = _##name##_v9; \
|
||||
__asm volatile ("jsr a6@(-"#offs":W)" \
|
||||
: "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
|
||||
: "=r" (_##name##_re) \
|
||||
: "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7), "rf"(_n8), "rf"(_n9) \
|
||||
: "fp0", "fp1", "cc", "memory"); \
|
||||
: "d0", "d1", "a0", "a1", "fp0", "fp1", "cc", "memory"); \
|
||||
_##name##_re; \
|
||||
}); \
|
||||
_##name##_re2; \
|
||||
} \
|
||||
})
|
||||
|
||||
/* For example intuition.library/NewModifyProp() */
|
||||
@ -839,11 +667,7 @@
|
||||
t8 _##name##_v8 = (v8); \
|
||||
t9 _##name##_v9 = (v9); \
|
||||
{ \
|
||||
register int _d0 __asm("d0"); \
|
||||
register int _d1 __asm("d1"); \
|
||||
register int _a0 __asm("a0"); \
|
||||
register int _a1 __asm("a1"); \
|
||||
register void *const _##name##_bn __asm("a6") = (bn); \
|
||||
register struct Library *const _##name##_bn __asm("a6") = (struct Library*)(bn); \
|
||||
register t1 _n1 __asm(#r1) = _##name##_v1; \
|
||||
register t2 _n2 __asm(#r2) = _##name##_v2; \
|
||||
register t3 _n3 __asm(#r3) = _##name##_v3; \
|
||||
@ -854,9 +678,9 @@
|
||||
register t8 _n8 __asm(#r8) = _##name##_v8; \
|
||||
register t9 _n9 __asm(#r9) = _##name##_v9; \
|
||||
__asm volatile ("jsr a6@(-"#offs":W)" \
|
||||
: "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
|
||||
: /* no output */ \
|
||||
: "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7), "rf"(_n8), "rf"(_n9) \
|
||||
: "fp0", "fp1", "cc", "memory"); \
|
||||
: "d0", "d1", "a0", "a1", "fp0", "fp1", "cc", "memory"); \
|
||||
} \
|
||||
})
|
||||
|
||||
@ -873,13 +697,9 @@
|
||||
t8 _##name##_v8 = (v8); \
|
||||
t9 _##name##_v9 = (v9); \
|
||||
t10 _##name##_v10 = (v10); \
|
||||
rt _##name##_re2 = \
|
||||
({ \
|
||||
register int _d1 __asm("d1"); \
|
||||
register int _a0 __asm("a0"); \
|
||||
register int _a1 __asm("a1"); \
|
||||
{ \
|
||||
register rt _##name##_re __asm("d0"); \
|
||||
register void *const _##name##_bn __asm("a6") = (bn); \
|
||||
register struct Library *const _##name##_bn __asm("a6") = (struct Library*)(bn); \
|
||||
register t1 _n1 __asm(#r1) = _##name##_v1; \
|
||||
register t2 _n2 __asm(#r2) = _##name##_v2; \
|
||||
register t3 _n3 __asm(#r3) = _##name##_v3; \
|
||||
@ -891,12 +711,11 @@
|
||||
register t9 _n9 __asm(#r9) = _##name##_v9; \
|
||||
register t10 _n10 __asm(#r10) = _##name##_v10; \
|
||||
__asm volatile ("jsr a6@(-"#offs":W)" \
|
||||
: "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
|
||||
: "=r" (_##name##_re) \
|
||||
: "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7), "rf"(_n8), "rf"(_n9), "rf"(_n10) \
|
||||
: "fp0", "fp1", "cc", "memory"); \
|
||||
: "d0", "d1", "a0", "a1", "fp0", "fp1", "cc", "memory"); \
|
||||
_##name##_re; \
|
||||
}); \
|
||||
_##name##_re2; \
|
||||
} \
|
||||
})
|
||||
|
||||
/* Only graphics.library/BltMaskBitMapRastPort() */
|
||||
@ -913,11 +732,7 @@
|
||||
t9 _##name##_v9 = (v9); \
|
||||
t10 _##name##_v10 = (v10); \
|
||||
{ \
|
||||
register int _d0 __asm("d0"); \
|
||||
register int _d1 __asm("d1"); \
|
||||
register int _a0 __asm("a0"); \
|
||||
register int _a1 __asm("a1"); \
|
||||
register void *const _##name##_bn __asm("a6") = (bn); \
|
||||
register struct Library *const _##name##_bn __asm("a6") = (struct Library*)(bn); \
|
||||
register t1 _n1 __asm(#r1) = _##name##_v1; \
|
||||
register t2 _n2 __asm(#r2) = _##name##_v2; \
|
||||
register t3 _n3 __asm(#r3) = _##name##_v3; \
|
||||
@ -929,9 +744,9 @@
|
||||
register t9 _n9 __asm(#r9) = _##name##_v9; \
|
||||
register t10 _n10 __asm(#r10) = _##name##_v10; \
|
||||
__asm volatile ("jsr a6@(-"#offs":W)" \
|
||||
: "=r" (_d0), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
|
||||
: /* no output */ \
|
||||
: "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7), "rf"(_n8), "rf"(_n9), "rf"(_n10) \
|
||||
: "fp0", "fp1", "cc", "memory"); \
|
||||
: "d0", "d1", "a0", "a1", "fp0", "fp1", "cc", "memory"); \
|
||||
} \
|
||||
})
|
||||
|
||||
@ -949,13 +764,9 @@
|
||||
t9 _##name##_v9 = (v9); \
|
||||
t10 _##name##_v10 = (v10); \
|
||||
t11 _##name##_v11 = (v11); \
|
||||
rt _##name##_re2 = \
|
||||
({ \
|
||||
register int _d1 __asm("d1"); \
|
||||
register int _a0 __asm("a0"); \
|
||||
register int _a1 __asm("a1"); \
|
||||
{ \
|
||||
register rt _##name##_re __asm("d0"); \
|
||||
register void *const _##name##_bn __asm("a6") = (bn); \
|
||||
register struct Library *const _##name##_bn __asm("a6") = (struct Library*)(bn); \
|
||||
register t1 _n1 __asm(#r1) = _##name##_v1; \
|
||||
register t2 _n2 __asm(#r2) = _##name##_v2; \
|
||||
register t3 _n3 __asm(#r3) = _##name##_v3; \
|
||||
@ -968,12 +779,11 @@
|
||||
register t10 _n10 __asm(#r10) = _##name##_v10; \
|
||||
register t11 _n11 __asm(#r11) = _##name##_v11; \
|
||||
__asm volatile ("jsr a6@(-"#offs":W)" \
|
||||
: "=r" (_##name##_re), "=r" (_d1), "=r" (_a0), "=r" (_a1) \
|
||||
: "=r" (_##name##_re) \
|
||||
: "r" (_##name##_bn), "rf"(_n1), "rf"(_n2), "rf"(_n3), "rf"(_n4), "rf"(_n5), "rf"(_n6), "rf"(_n7), "rf"(_n8), "rf"(_n9), "rf"(_n10), "rf"(_n11) \
|
||||
: "fp0", "fp1", "cc", "memory"); \
|
||||
: "d0", "d1", "a0", "a1", "fp0", "fp1", "cc", "memory"); \
|
||||
_##name##_re; \
|
||||
}); \
|
||||
_##name##_re2; \
|
||||
} \
|
||||
})
|
||||
|
||||
#endif /* __INLINE_MACROS_H */
|
||||
|
||||
Reference in New Issue
Block a user