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Backport changes 102337, 155527, 209759, 233603.

This commit is contained in:
Krystian Bacławski 2016-10-18 11:32:05 +02:00
parent f52c9355e6
commit 37aef96904
2 changed files with 41 additions and 12 deletions
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17
gcc/ChangeLog
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@ -1,3 +1,20 @@
Tue Oct 18 11:28:12 CEST 2016 Krystian Baclawski
2016-02-22 Jakub Jelinek <jakub@redhat.com>
* config/m68k/m68k.md (ashldi3, ashrdi3, lshrdi3): Use
SImode for last match_operand.
2014-04-24 Segher Boessenkool <segher@kernel.crashing.org>
* config/m68k/m68k.md (extendplussidi): Don't allow memory for
operand 1.
2009-12-30 Andreas Schwab <schwab@linux-m68k.org>
* config/m68k/m68k.md (rotlsi_16): New insn.
2005-07-24 Andreas Schwab <schwab@suse.de>
* config/m68k/m68k.md ("extendqidi2"): When source is an address
register use a word move. Correct operand of ext.w in 68000 code.
Sun Oct 16 20:02:26 CEST 2016 Krystian Baclawski
2004-03-16 Richard Zidlicky <rz@linux-m68k.org>

36
gcc/config/m68k/m68k.md
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@ -1702,9 +1702,19 @@
CC_STATUS_INIT;
operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]) + 1);
if (TARGET_68020 || TARGET_5200)
return \"move%.b %1,%2\;extb%.l %2\;smi %0\;extb%.l %0\";
{
if (ADDRESS_REG_P (operands[1]))
return \"move%.w %1,%2\;extb%.l %2\;smi %0\;extb%.l %0\";
else
return \"move%.b %1,%2\;extb%.l %2\;smi %0\;extb%.l %0\";
}
else
return \"move%.b %1,%2\;ext%.w %0\;ext%.l %2\;move%.l %2,%0\;smi %0\";
{
if (ADDRESS_REG_P (operands[1]))
return \"move%.w %1,%2\;ext%.w %2\;ext%.l %2\;move%.l %2,%0\;smi %0\";
else
return \"move%.b %1,%2\;ext%.w %2\;ext%.l %2\;move%.l %2,%0\;smi %0\";
}
}")
(define_insn "extendhidi2"
@ -1741,9 +1751,11 @@
;; Maybe there is a way to make that the general case, by forcing the
;; result of the SI tree to be in the lower register of the DI target
;; Don't allow memory for operand 1 as that would require an earlyclobber
;; which results in worse code
(define_insn "extendplussidi"
[(set (match_operand:DI 0 "register_operand" "=d")
(sign_extend:DI (plus:SI (match_operand:SI 1 "general_operand" "%rmn")
(sign_extend:DI (plus:SI (match_operand:SI 1 "general_operand" "%rn")
(match_operand:SI 2 "general_operand" "rmn"))))]
""
"*
@ -4611,9 +4623,9 @@
} ")
(define_expand "ashldi3"
[(set (match_operand:DI 0 "general_operand" "")
(ashift:DI (match_operand:DI 1 "general_operand" "")
(match_operand 2 "const_int_operand" "")))]
[(set (match_operand:DI 0 "register_operand" "")
(ashift:DI (match_operand:DI 1 "register_operand" "")
(match_operand:SI 2 "const_int_operand" "")))]
"!TARGET_5200"
"
{
@ -4822,9 +4834,9 @@
} ")
(define_expand "ashrdi3"
[(set (match_operand:DI 0 "general_operand" "")
(ashiftrt:DI (match_operand:DI 1 "general_operand" "")
(match_operand 2 "const_int_operand" "")))]
[(set (match_operand:DI 0 "register_operand" "")
(ashiftrt:DI (match_operand:DI 1 "register_operand" "")
(match_operand:SI 2 "const_int_operand" "")))]
"!TARGET_5200"
"
{
@ -4990,9 +5002,9 @@
} ")
(define_expand "lshrdi3"
[(set (match_operand:DI 0 "general_operand" "")
(lshiftrt:DI (match_operand:DI 1 "general_operand" "")
(match_operand 2 "const_int_operand" "")))]
[(set (match_operand:DI 0 "register_operand" "")
(lshiftrt:DI (match_operand:DI 1 "register_operand" "")
(match_operand:SI 2 "const_int_operand" "")))]
"!TARGET_5200"
"
{